1. Field of the Invention
The present invention relates to a method of inspecting a RAM of a programmable logic controller, and to a programmable logic controller.
2. Description of the Related Art
A programmable logic controller (hereinafter referred to as “PLC”) is used to control automated machinery in a factory or the like. The PLC includes a central processing unit (hereinafter referred to as “CPU”) that is a small computer and that executes a program. A ladder diagram that simulates a ladder circuit is used to prepare the program. The ladder diagram may be rewritten as appropriate into a sequence program that matches the usage. The PLC receives a signal (on or off information) about a continuity state input from a variety of input devices (such as switches and sensors). The PLC controls (e.g. outputs an on or off signal to) output devices (such as relays and motors) with the sequence program in which the variety of input devices are combined in a desired form (connected in series or in parallel).
It is necessary that the PLC used in a factory or the like should meet a predetermined safety standard (e.g. the IEC standard). Among such safety standards, there is provided a safety standard for a random access memory (that is abbreviated as “RAM” and that is a memory that enables data to be read from and written into a desired address at any time) used by the CPU. A variety of methods have been considered to inspect the RAM in order to meet the safety standard for the RAM. For example, a method called Galpat may be used to inspect the RAM in order to meet the safety standard for the RAM. However, inspecting the RAM using the Galpat takes a significantly long time (e.g. about two to three hours), and it takes much time to detect an abnormality of the RAM, which is not preferable.
Japanese Patent Application Publication No. 8-87429 (JP 8-87429 A) describes a method of inspecting an application program storage region (ROM region) of a PLC for performing sequence control that is changed in accordance with the usage, in which a check sum (inspection reference value) obtained by totaling program codes in a region to be inspected is stored in the ROM in advance. To execute the inspection, it is determined whether or not a value obtained by totaling values read from the ROM as the region to be inspected coincides with the check sum stored in the ROM.
Japanese Patent Application Publication No. 2006-40122 (JP 2006-40122 A) describes an inspection method in which a RAM region of a PLC to be inspected is divided into a plurality of regions, one inspection unit is inspected each time the PLC is turned on, and an inspection unit that is next to the inspection unit inspected before the PLC is turned off the last time is inspected when the PLC is turned on again after the PLC is turned off.
The inspection method described in JP 8-87429 A is intended to inspect program codes stored in the ROM, not to inspect the RAM, which enables values to be rewritten at any time, and may not be applied to the inspection of the RAM.
In the inspection method described in JP 2006-40122 A, the entire RAM region to be inspected is not inspected at a time when the PLC is turned on, but the inspection is performed little by little each time the PLC is turned on until the entire RAM region is completely inspected when the PLC is turned on the N-th time. Thus, it takes much time to detect an abnormality of the RAM since the occurrence of the abnormality, which is not preferable.